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A 32 Gb/s, 4.7 pJ/bit Optical Link With -11.7 dBm Sensitivity in 14-nm FinFET CMOS., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 53 (4): 1214-1226 (2018)A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS., , , , , , and . IEEE J. Solid State Circuits, 55 (1): 19-26 (2020)A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic Switch Networks., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 50 (12): 3120-3132 (2015)A WDM-Compatible 4 × 32-Gb/s CMOS-driven electro-absorption modulator array., , , , , , , , , and 4 other author(s). OFC, page 1-3. IEEE, (2015)A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 58 (4): 1074-1086 (2023)Mismatch analysis and statistical design at 65 nm and below., , , , and . CICC, page 9-12. IEEE, (2008)Errata Erratum to Ä 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS"., , , , , , and . IEEE J. Solid State Circuits, 55 (4): 1124 (2020)Ultra-Low-Power 10 to 285 Gb/s CMOS-Driven VCSEL-Based Optical Links Invited., , , , and . JOCN, 4 (11): B114-B123 (2012)29.1 A 64Gb/s 1.4pJ/b NRZ optical-receiver data-path in 14nm CMOS FinFET., , , , , , , , , and 6 other author(s). ISSCC, page 482-483. IEEE, (2017)A 56.1Gb/s NRZ modulated 850nm VCSEL-based optical link., , , , , , , , , and 4 other author(s). OFC/NFOEC, page 1-3. IEEE, (2013)