( en | de | ru )

 

Disambiguation of "Ratkovic, Ivan"

Author of the publication

copydeleteadd this publication to your clipboard
Imposing coarse-grained reconfiguration to general purpose processors.

, , , , , , , and . SAMOS, page 42-51. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Alina Ratkovic

Sarah Ivanovas

Marian Ivanov

Natalie Ivanits

Oxana Ivanova-Chessex

 

Other publications of authors with the same name

Imposing coarse-grained reconfiguration to general purpose processors., , , , , , , and . SAMOS, page 42-51. IEEE, (2015)An Integrated Vector-Scalar Design on an In-Order ARM Core., , , , , , and . ACM Trans. Archit. Code Optim., 14 (2): 17:1-17:26 (2017)Research in computing-intensive simulations for nature-oriented civil-engineering and related scientific fields, using machine learning and big data: an overview of open problems., , , , , , , , , and 22 other author(s). J. Big Data, 10 (1): 73 (2023)Joint Circuit-System Design Space Exploration of Multiplier Unit Structure for Energy-Efficient Vector Processors., , , , , , , and . ISVLSI, page 19-26. IEEE Computer Society, (2015)VALib and SimpleVector: tools for rapid initial research on vector architectures., , , , , and . Conf. Computing Frontiers, page 7:1-7:10. ACM, (2014)On the selection of adder unit in energy efficient vector processing., , , , , and . ISQED, page 143-150. IEEE, (2013)Physical vs. Physically-Aware Estimation Flow: Case Study of Design Space Exploration of Adders., , , , , and . ISVLSI, page 118-123. IEEE Computer Society, (2014)A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques., , , , , and . ISLPED, page 362-367. ACM, (2016)On the design of power- and energy-efficient functional units for vector processors.. Polytechnic University of Catalonia, Spain, (2016)The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chip, for Scientific Computing, Geo Physics, Complex Mathematics, and Information Processing., , , , , , , , , and 10 other author(s). MECO, page 1-6. IEEE, (2021)