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Disambiguation of "Anis, Mohab H."

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Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design.

, , and . VLSI-SoC, page 368-373. IEEE, (2013)

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Mohab Hossam

Siegfried Anisch

Muhammad Anis

Luc Aniset

Natalia Anisimova

 

Other publications of authors with the same name

A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages., , and . ISCAS, page 748-751. IEEE, (2000)A DFM tool for analyzing lithography and stress effects on standard cells and critical path performance in 45nm digital designs., , , , and . IDT, page 13-17. IEEE, (2010)1T2R: A novel memory cell design to resolve single-event upset in RRAM arrays., , , and . ASICON, page 12-15. IEEE, (2017)High performance electrical driven hotspot detection solution for full chip design using a novel device parameter matching technique., , , , , and . ISQED, page 223-227. IEEE, (2012)An electrical-aware parametric DFM solution for analog circuits., , , , , , , and . IDT, page 68-73. IEEE, (2011)RRAM Refresh Circuit: A Proposed Solution To Resolve The Soft-Error Failures For HfO2/Hf 1T1R RRAM Memory Cell., , and . ACM Great Lakes Symposium on VLSI, page 227-232. ACM, (2016)Effect of technology scaling on digital CMOS logic styles., , and . CICC, page 401-408. IEEE, (2000)A parametric DFM solution for analog circuits: Electrical driven hot spot detection, analysis and correction flow., , , , , , , and . SoCC, page 231-236. IEEE, (2011)Schematic-driven physical verification: Fully automated solution for analog IC design., , , , , , and . SoCC, page 260-264. IEEE, (2012)A Study of the Effect of RRAM Reliability Soft Errors on the Performance of RRAM-Based Neuromorphic Systems., , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (11): 3125-3137 (2017)