Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.

T. Lin, C. Chien, P. Chang, C. Chen, P. Wang, T. Shyu, C. Chou, S. Luo, J. Guo, T. Chen, G. Chuang, Y. Chu, L. Cheng, H. Su, C. Jou, M. Ieong, C. Wu, and J. Wang. ISSCC, page 158-159. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jia-Jiun Yan

Jiun-Hao Wang

Jiun-Shan Chen

Shann-Jiun Chang

Jiun-Hung Yu

Other publications of authors with the same name

Radar and Camera Fusion for Vacant Parking Space Detection.B. Wu, J. Lin, H. Kuo, P. Chen, and J. Guo. AICAS, page 242-245. IEEE, (2022)An efficient design for one dimensional discrete cosine transform using parallel adders.J. Guo. ISCAS, page 725-728. IEEE, (2000)Real-time LiDAR module with 64x128-pixel CMOS SPAD array and 940-nm PCSEL.A. Hsiao, C. Liu, P. Chen, Y. Liu, W. Wang, T. Sang, C. Tsai, G. Lin, J. Guo, and S. Lin. SAS, page 1-6. IEEE, (2022)Real-Time 3D Depth Generation for Stereoscopic Video Applications with Thread-Level Superscalar-Pipeline Parallelization.G. Jian, C. Chien, P. Chen, and J. Guo. J. Signal Process. Syst., 72 (1): 17-33 (2013)An efficient design for one-dimensional discrete Hartley transform using parallel additions.J. Guo. IEEE Trans. Signal Process., 48 (10): 2806-2813 (2000)Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique.C. Cheng, and J. Guo. VLSI-DAT, page 1-2. IEEE, (2020)A variable-voltage low-power technique for digital circuit system.A. Xiao, Y. Miao, C. Cheng, and J. Guo. ASP-DAC, page 13-14. IEEE, (2016)An Adaptive Cross-Window stereo camera Distance Estimation technology and its system implementation for multiple applications.R. Lee, T. en Wu, and J. Guo. VLSI-DAT, page 1-4. IEEE, (2017)Dynamic voltage domain assignment technique for low power performance manageable cell based design.E. Lee, F. Chien, C. Cheng, and J. Guo. ASP-DAC, page 359-360. IEEE, (2010)Dual-phase pipeline circuit design automation with a built-in performance adjusting mechanism.Y. Tsai, C. Tsai, C. Chien, C. Cheng, and J. Guo. ASP-DAC, page 85-86. IEEE, (2011)

BibSonomy

Disambiguation of "Guo, Jiun-In"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.

Please choose a person to relate this publication to

Jia-Jiun Yan

Jiun-Hao Wang

Jiun-Shan Chen

Shann-Jiun Chang

Jiun-Hung Yu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Guo, Jiun-In"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.

Please choose a person to relate this publication to

Jia-Jiun Yan

Jiun-Hao Wang

Jiun-Shan Chen

Shann-Jiun Chang

Jiun-Hung Yu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.