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NBTI-aware design of integrated circuits: a hardware-based approach.

, , , and . LATS, page 1-6. IEEE Computer Society, (2015)

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Evaluating the Impact of Temperature on Dynamic Fault Behaviour of FinFET-Based SRAMs with Resistive Defects., , , , and . J. Electron. Test., 35 (2): 191-200 (2019)Analysing NBTI Impact on SRAMs with Resistive Defects., , , , and . J. Electron. Test., 33 (5): 637-655 (2017)Influence of temperature on dynamic fault behavior due to resistive defects in FinFET-based SRAMs., , , , and . LATS, page 1-6. IEEE, (2018)Improving the Detection of Undefined State Faults in FinFET SRAMs., , , , , , and . DTIS, page 1-6. IEEE, (2021)NBTI-aware design of integrated circuits: a hardware-based approach., , , and . LATS, page 1-6. IEEE Computer Society, (2015)Analyzing NBTI impact on SRAMs with resistive-open defects., , , , and . LATS, page 87-92. IEEE, (2016)Detecting Random Read Faults to Reduce Test Escapes in FinFET SRAMs., , , , , and . ETS, page 1-6. IEEE, (2021)A defect-oriented test approach using on-Chip current sensors for resistive defects in FinFET SRAMs., , , , and . Microelectron. Reliab., (2018)Analyzing the Impact of SEUs on SRAMs with Resistive-Bridge Defects., , and . VLSID, page 487-492. IEEE Computer Society, (2016)