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Recent Improvements on the Specification of Transient-Fault Tolerant VHDL Descriptions: A Case-Study for Area Overhead Analysis., and . SBCCI, page 249-254. IEEE Computer Society, (2000)Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip., , , , , and . J. Electron. Test., 21 (4): 349-363 (2005)Time Management for Low-Power Design of Digital Systems., , , , , , and . J. Low Power Electron., 4 (3): 410-419 (2008)Bits, Flips and RISCs., , , , , , , , , and 3 other author(s). DDECS, page 140-149. IEEE, (2023)An Approach for Designing Total-Dose Tolerant MCMs Based on Current Monitoring., , and . ITC, page 345-354. IEEE Computer Society, (1995)Configurable platform for IC combined tests of total-ionizing dose radiation and electromagnetic immunity., , , , , , , , and . LATW, page 1-6. IEEE, (2011)A dynamic TDMA-based sleep scheduling to minimize WSN energy consumption., , , , , and . ICNSC, page 1-6. IEEE, (2016)Measuring clock-signal modulation efficiency for Systems-on-Chip in electromagnetic interference environment., , , , , , , , , and 5 other author(s). LATW, page 1-6. IEEE, (2009)On-chip aging sensor to monitor NBTI effect in nano-scale SRAM., , , and . DDECS, page 354-359. IEEE, (2012)Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG., , , , , , , , , and 1 other author(s). LATS, page 1-6. IEEE Computer Society, (2015)