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A 53-Gbit/s Optical Receiver Frontend With 0.65 pJ/bit in 28-nm Bulk-CMOS., , , , , и . IEEE J. Solid State Circuits, 54 (3): 845-855 (2019)4×40 Gb/s 2 pJ/bit Optical RX with 8ns Power-on and CDR-Lock Time in 14nm CMOS., , , , , , , , , и 6 other автор(ы). OFC, стр. 1-3. IEEE, (2018)A Low-Power Fast Settling 5.4 - 8.4 GHz Digitally Controlled Oscillator in 45 nm RFSOI CMOS., , , , и . MWSCAS, стр. 113-116. IEEE, (2020)A Mixed-Signal Offset-Compensation System for Multi-Gbit/s Optical Receiver Frontends., , , и . VLSI-SoC, стр. 46-51. IEEE, (2019)Implementation of Low-Power 6-8 b 30-90 GS/s Time-Interleaved ADCs With Optimized Input Bandwidth in 32 nm CMOS., , , , , , , , , и 1 other автор(ы). IEEE J. Solid State Circuits, 51 (3): 636-648 (2016)Opto-electrical analog front-end with rapid power-on and 0.82 pJ/bit for 28 Gb/s in 14 nm FinFET CMOS., , , , и . SoCC, стр. 253-257. IEEE, (2017)A 90 μW, 2.5 GHz high linearity programmable delay cell for signal duty-cycle adjustment., , , и . SoCC, стр. 278-283. IEEE, (2019)A 110 mW 6 bit 36 GS/s interleaved SAR ADC for 100 GBE occupying 0.048 mm2 in 32 nm SOI CMOS., , , , , , , , , и 1 other автор(ы). A-SSCC, стр. 89-92. IEEE, (2014)Combinational Decompressors with Nonlinear Codes., , и . DSD, стр. 500-505. IEEE, (2019)Decompressors using nonlinear codes., , и . Microprocess. Microsystems, (2020)