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Studying the Impact of Temperature Gradient on Electromigration Lifetime Using a Power Grid Test Structure with On-Chip Heaters.

, , , , and . IRPS, page 1-5. IEEE, (2023)

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Control of design specific variation in etch-assisted via pattern transfer by means of full-chip simulation., , , , , , , , , and 1 other author(s). ISQED, page 156-161. IEEE Computer Society, (2009)Multi-scale Simulation Methodology for Stress Assessment in 3D IC: Effect of Die Stacking on Device Performance., , , , , , and . J. Electron. Test., 28 (1): 63-72 (2012)Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages., , , and . IRPS, page 1-7. IEEE, (2019)Novel Methodology for Assessing Chip-Package Interaction Effects onChip Performance., , , , , , , , , and 6 other author(s). ISPD, page 83-89. ACM, (2022)An Accurate Assessment of Chip-Package Interaction is a Key Factor for Designing Resilient 3D IC Systems., , and . 3DIC, page 1-6. IEEE, (2019)Physics-Based Electromigration Models and Full-Chip Assessment for Power Grid Networks., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (11): 1848-1861 (2016)Electromigration Assessment in Power Grids with Account of Redundancy and Non-Uniform Temperature Distribution., , , , , , , and . ISPD, page 124-132. ACM, (2023)Post placement leakage reduction with stress-enhanced filler cells., , , , , and . ISLPED, page 303-308. IEEE, (2015)Studying the Impact of Temperature Gradient on Electromigration Lifetime Using a Power Grid Test Structure with On-Chip Heaters., , , , and . IRPS, page 1-5. IEEE, (2023)Novel methodology for temperature-aware electromigration assessment in on-chip power grid: simulations and experimental validation (Invited)., , , and . IRPS, page 8. IEEE, (2022)