Author of the publication

A 195mW / 55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS.

, , , , , , , , and . ISSCC, page 34-35. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology., , , , , , , , , and 9 other author(s). ISSCC, page 108-109. IEEE, (2023)3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS., , , , , , , , and . ISSCC, page 58-59. IEEE, (2016)29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs in 20nm CMOS., , , , , , , , , and 6 other author(s). ISSCC, page 484-485. IEEE, (2017)18.1 A 600Gb/s DP-QAM64 Coherent Optical Transceiver Frontend with 4x105GS/s 8b ADC/DAC in 16nm CMOS., , , , , , , , , and 9 other author(s). ISSCC, page 338-340. IEEE, (2024)A Sub-200 fs RMS jitter capacitor multiplier loop filter-based PLL in 28 nm CMOS for high-speed serial communication applications., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2013)A 90nm CMOS DSP MLSD Transceiver with Integrated AFE for Electronic Dispersion Compensation of Multi-mode Optical Fibers at 10Gb/s., , , , , , , , , and 11 other author(s). ISSCC, page 232-233. IEEE, (2008)A 90 nm CMOS DSP MLSD Transceiver With Integrated AFE for Electronic Dispersion Compensation of Multimode Optical Fibers at 10 Gb/s., , , , , , , , , and 13 other author(s). IEEE J. Solid State Circuits, 43 (12): 2939-2957 (2008)3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 195mW / 55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS., , , , , , , , and . ISSCC, page 34-35. IEEE, (2013)