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Disambiguation of "Niitsu, Kiichi"

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AI-Based Edge-Intelligent Hypoglycemia Prediction System Using Alternate Learning and Inference Method for Blood Glucose Level Data with Low-periodicity.

, , , , , , , and . AICAS, page 201-206. IEEE, (2019)

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Kiichi Hamamoto

 

Other publications of authors with the same name

A 385×385μm2 0.165V 0.27nW Fully-Integrated Supply-Modulated OOK Transmitter in 65nm CMOS for Glasses-Free, Self-Powered, and Fuel-Cell-Embedded Continuous Glucose Monitoring Contact Lens., , , , , , and . IEICE Trans. Electron., 102-C (7): 590-594 (2019)Design and Analysis of Scalability in Current-Mode Analog-to-Time Converter for an Energy-Efficient and High-Resolution CMOS Biosensor Array., , , and . IEICE Trans. Electron., 100-C (6): 597-601 (2017)3-D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 45 (4): 856-862 (2010)Low-Voltage Gate-Leakage-Based Timer Using an Amplifier-Less Replica-Bias Switching Technique in 55-nm DDC CMOS., and . IEEE Open J. Circuits Syst., (2020)Design and Experimental Verification of a 2.1nW 0.018mm2 Slope ADC-Based Supply Voltage Monitor for Biofuel-Cell-Powered Supply-Sensing Systems in 180-nm CMOS., , and . IEICE Trans. Electron., 105-C (10): 565-570 (October 2022)A Solar-Cell-Assisted, 99% Biofuel Cell Area Reduced, Biofuel-Cell-Powered Wireless Biosensing System in 65nm CMOS for Continuous Glucose Monitoring Contact Lenses., and . IEICE Trans. Electron., 105-C (7): 343-348 (2022)Design and theoretical analysis of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges., , , and . IEICE Electron. Express, 16 (13): 20190218 (2019)Digitally-controlled Gm-C bandpass filter., , , , , , , and . APCCAS, page 531-534. IEEE, (2012)A low-voltage CMOS electrophoresis IC using electroless gold plating for small-form-factor biomolecule manipulation., , , and . ASP-DAC, page 11-12. ACM, (2019)A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS., , , , , and . ASP-DAC, page 553-554. IEEE, (2012)