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Disambiguation of "Chen, Deming"

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An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization.

, , , and . IPDPS, page 83-94. IEEE Computer Society, (2012)

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Liu Deming

Deming Sun

Deming Kong

Deming Kong

Chen Chen

 

Other publications of authors with the same name

Resource and data optimization for hardware implementation of deep neural networks targeting FPGA-based edge devices., , , and . SLIP@DAC, page 1:1-1:8. ACM, (2018)C-Mine: Data Mining of Logic Common Cases for Low Power Synthesis of Better-Than-Worst-Case Designs., , and . DAC, page 205:1-205:6. ACM, (2014)Throughput-oriented kernel porting onto FPGAs., , , , and . DAC, page 11:1-11:10. ACM, (2013)Optimality study of resource binding with multi-Vdds., , , and . DAC, page 580-585. ACM, (2006)Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation., , , , , and . DAC, page 7:1-7:6. ACM, (2016)Fast large-scale optimal power flow analysis for smart grid through network reduction., and . ASP-DAC, page 373-378. IEEE, (2014)Flexible transition metal dichalcogenide field-effect transistors: A circuit-level simulation study of delay and power under bending, process variation, and scaling., , and . ASP-DAC, page 761-768. IEEE, (2016)A SPICE-compatible model of graphene nano-ribbon field-effect transistors enabling circuit-level delay and power analysis under process variation., , , , , and . DATE, page 1789-1794. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Behavioral-level IP integration in high-level synthesis., , , and . FPT, page 172-175. IEEE, (2015)High-level synthesis with behavioral level multi-cycle path analysis., , , , and . FPL, page 1-8. IEEE, (2013)