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Disambiguation of "Angiolini, Federico"

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Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow.

, , and . Nano-Net, page 15. ICST/ACM, (2007)

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Alessia Angiolini

Federico Frenzel

Federico Latorre

Federico Utili

Federico Squartini

 

Other publications of authors with the same name

Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow., , and . Nano-Net, page 15. ICST/ACM, (2007)A post-compiler approach to scratchpad mapping of code., , , , and . CASES, page 259-267. ACM, (2004)Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips., , , , , , and . SoC, page 1-4. IEEE, (2006)Quest for the ultimate network-on-chip: the NaNoC project., , , , , , , , and . INA-OCMC@HiPEAC, page 43-46. ACM, (2012)Tackling the bottleneck of delay tables in 3D ultrasound imaging., , , , , , and . DATE, page 1683-1688. ACM, (2015)A Network Traffic Generator Model for Fast Network-on-Chip Simulation., , , , , and . DATE, page 780-785. IEEE Computer Society, (2005)1024-Channel 3D ultrasound digital beamformer in a single 5W FPGA., , , , , , and . DATE, page 1225-1228. IEEE, (2017)Developing Mesochronous Synchronizers to Enable 3D NoCs., , and . DATE, page 1414-1419. ACM, (2008)xpipes Lite: A Synthesis Oriented Design Library For Networks on Chips., , , , , and . DATE, page 1188-1193. IEEE Computer Society, (2005)A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (3): 421-434 (2007)