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A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (12): 3486-3502 (2017)A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET., , , , , , , , , and 5 other author(s). VLSI Circuits, page 47-48. IEEE, (2018)A 0.5-16.3Gbps multi-standard serial transceiver with 219mW/channel in 16nm FinFET., , , , , , , , , and 7 other author(s). ESSCIRC, page 297-300. IEEE, (2016)6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET., , , , , , , , , and 11 other author(s). ISSCC, page 116-118. IEEE, (2020)A 2.25pJ/bit Multi-lane Transceiver for Short Reach Intra-package and Inter-package Communication in 16nm FinFET., , , , , , , , , and 9 other author(s). CICC, page 1-8. IEEE, (2019)6.3 A 40-to-56Gb/s PAM-4 receiver with 10-tap direct decision-feedback equalization in 16nm FinFET., , , , , , , , , and 7 other author(s). ISSCC, page 114-115. IEEE, (2017)A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET., , , , , , , , , and 11 other author(s). IEEE J. Solid State Circuits, 56 (1): 7-18 (2021)A 126mW 56Gb/s NRZ wireline transceiver for synchronous short-reach applications in 16nm FinFET., , , , , , , , , and 6 other author(s). ISSCC, page 274-276. IEEE, (2018)A 0.5-16.3 Gbps Multi-Standard Serial Transceiver With 219 mW/Channel in 16-nm FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (7): 1783-1797 (2017)