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Disambiguation of "Iizuka, Tetsuya"

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A SPAD array sensor based on breakdown pixel extraction architecture with background readout for scintillation detector.

, , , , , and . IEEE SENSORS, page 1-3. IEEE, (2017)

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Tetsuya Takahashi

Hajime Iizuka

Tetsuya Mizutani

Tetsuya Kawata

Tetsuya Takahashi

 

Other publications of authors with the same name

Spatial resolution improvement for point light source detection in scintillator cube using SPAD array with multi pinholes., , , , and . IEICE Electron. Express, 16 (19): 20190390 (2019)High-resolution measurement of magnetic field generated from cryptographic LSIs., , , , , and . SAS, page 111-114. IEEE, (2014)A Gate Delay Mismatch Tolerant Time-Mode Analog Accumulator Using a Delay Line Ring., , , and . IEICE Trans. Electron., 100-C (9): 736-745 (2017)Exact Minimum-Width Transistor Placement for Dual and Non-dual CMOS Cells., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (12): 3485-3491 (2005)All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Utilizing Buffer Ring with Pulse Counter., , , , and . IEICE Trans. Electron., 94-C (4): 487-494 (2011)Cascaded Time Difference Amplifier with Differential Logic Delay Cell., , , , and . IEICE Trans. Electron., 94-C (4): 654-662 (2011)A Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion., , , and . VLSI-SoC, page 55-58. IEEE, (2018)Mining sequential patterns including time intervals., , , and . Data Mining and Knowledge Discovery: Theory, Tools, and Technology, volume 4057 of SPIE Proceedings, page 213-220. SPIE, (2000)Experimental demonstration of stochastic comparators for fine resolution ADC without calibration., , , , and . ICECS, page 29-32. IEEE, (2016)All-digital PMOS and NMOS process variability monitor utilizing buffer ring with pulse counter., , , , and . ASP-DAC, page 79-80. IEEE, (2011)