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Functional Testing and Constrained Synthesis of Sequential Architectures.

, , and . ISCAS, page 1523-1526. IEEE, (1993)

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A new switching-level approach to multiple-output functions synthesis., , , and . VLSI Design, page 125-129. IEEE Computer Society, (1995)Fault Detection in Sequential Circuits through Functional Testing., , and . DFT, page 191-198. IEEE Computer Society, (1993)A CMOS Fault Tolerant Architecture for Swith-Level Faults., , , and . DFT, page 10-18. IEEE Computer Society, (1994)Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks., , , , , and . DFT, page 223-230. IEEE Computer Society, (1993)An Expert Solution to Functional Testability Analysis of VLSI Circuits., , , , , and . SEKE, page 263-265. Knowledge Systems Institute, (1993)Functional Fault Models and Gate Level Coverage for Sequential Architectures., , and . ICCD, page 572-575. IEEE Computer Society, (1993)Functional Testing and Constrained Synthesis of Sequential Architectures., , and . ISCAS, page 1523-1526. IEEE, (1993)CMOS Reliability Improvements Through a New Fault Tolerant Technique., , , and . ISCAS, page 83-86. IEEE, (1994)Behavior of Self-Checking Checkers for 1-out-of-3 Codes Based on Pass-Transistor Logic., , and . ISCAS, page 1924-1927. IEEE, (1995)Exploring the Role of Inter-Organizational Information Systems within SMEs Aggregations., , , and . Bled eConference, page 26. (2005)