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Dual-Loop Two-Step ZQ Calibration for Dynamic Voltage-Frequency Scaling in LPDDR4 SDRAM., , , , , , , , , and 13 other author(s). IEEE J. Solid State Circuits, 53 (10): 2906-2916 (2018)System Design and Evaluation of the Robot Tactile Sensor Using the Microbending Fiber Optic Sensors., , and . RO-MAN, page 14-18. IEEE, (2007)An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 212-224 (2021)A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process., , , , , , , , , and 37 other author(s). ISSCC, page 206-208. IEEE, (2018)A sub-0.85V, 6.4GBP/S/Pin TX-Interleaved Transceiver with Fast Wake-Up Time Using 2-Step Charging Control and VOHCalibration in 20NM DRAM Process., , , , , , , , , and 16 other author(s). VLSI Circuits, page 147-148. IEEE, (2018)A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration., , , , , , , , , and 14 other author(s). VLSI Circuits, page 114-. IEEE, (2019)Visual Tracking Algorithm for Laparoscopic Robot Surgery., , and . FSKD (2), volume 3614 of Lecture Notes in Computer Science, page 344-351. Springer, (2005)22.2 An 8.5Gb/s/pin 12Gb-LPDDR5 SDRAM with a Hybrid-Bank Architecture using Skew-Tolerant, Low-Power and Speed-Boosting Techniques in a 2nd generation 10nm DRAM Process., , , , , , , , , and 29 other author(s). ISSCC, page 382-384. IEEE, (2020)Dual-loop 2-step ZQ calibration for dedicated power supply voltage in LPDDR4 SDRAM., , , , , , , , , and 25 other author(s). A-SSCC, page 153-156. IEEE, (2017)