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Disambiguation of "Shin, Hyungcheol"

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Accurate Extraction of the Trap Depth from RTS Noise Data by Including Poly Depletion Effect and Surface Potential Variation in MOSFETs.

, , , and . IEICE Trans. Electron., 90-C (5): 968-972 (2007)

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Dong-Shin Shin

Jeonghun Shin

Kirche als Weltforum: zum Dialogverständnis in kirchlichen Dokumenten seit dem Zweiten Vatikanischen Konzil. Uni München, (2009)

Hyeseon Shin

Koo Cheul Shin

Ikuya Shinoda

 

Other publications of authors with the same name

Accurate Extraction of the Trap Depth from RTS Noise Data by Including Poly Depletion Effect and Surface Potential Variation in MOSFETs., , , and . IEICE Trans. Electron., 90-C (5): 968-972 (2007)Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (1): 324-327 (January 2024)A 55dB SNR with 240Hz frame scan rate mutual capacitor 30×24 touch-screen panel read-out IC using code-division multiple sensing technique., , , , and . ISSCC, page 388-389. IEEE, (2013)Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices., , , , , and . IEICE Trans. Electron., 93-C (5): 596-601 (2010)The novel SCR-based ESD protection with low triggering and high holding voltages., , , and . Microelectron. J., 42 (6): 837-839 (2011)Analysis and modeling for random telegraph noise of GIDL current in saddle MOSFET for DRAM application., , , and . IEICE Electron. Express, 11 (13): 20140468 (2014)Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier., , , , , , and . IEEE J. Solid State Circuits, 40 (3): 726-735 (2005)Investigation of endurance degradation for 3-D charge trap NAND flash memory with bandgap-engineered tunneling oxide., , , , , and . IEICE Electron. Express, 19 (24): 20220465 (2022)Design Consideration for Vertical Nonvolatile Memory Device Regarding Gate-Induced Barrier Lowering (GIBL)., , , , , and . IEICE Trans. Electron., 92-C (5): 620-626 (2009)Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory., , , , , and . IEICE Trans. Electron., 92-C (5): 659-663 (2009)