( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges.

, , , , , , , , , , , , , , , , , , , , , , , , и . DAC, стр. 113:1-113:6. ACM, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Wolfgang Ecker

Wolfgang Ecker

Wolfgang Ecker

Wolfgang Ecker

Werner Ecker

 

Другие публикации лиц с тем же именем

Digital Hardware Design Based on Metamodels and Model Transformations., и . VLSI-SoC (Selected Papers), том 508 из IFIP Advances in Information and Communication Technology, стр. 83-107. Springer, (2016)Protocol merging: a VHDL-based method for clock cycle minimizing and protocol preserving scheduling of IO-operations., , и . EURO-DAC, стр. 624-629. IEEE Computer Society, (1994)MetFI: Model-driven Fault Simulation Framework., , , , , и . CoRR, (2022)Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation., , , , , , , и . VLSI-SoC, стр. 1-6. IEEE, (2022)Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation., , , , и . MCSoC, стр. 508-515. IEEE, (2023)MetaFS: Model-driven Fault Simulation Framework., , , , , , и . DFT, стр. 1-4. IEEE, (2022)Design centric modeling of digital hardware., , и . HLDVT, стр. 46-52. IEEE, (2016)A Machine Learning Approach for Area Prediction of Hardware Designs from Abstract Specifications., , , и . DSD, стр. 413-420. IEEE Computer Society, (2018)G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators., , , , , , , , , и 2 other автор(ы). DAC, стр. 1-6. IEEE, (2023)Formal Verification Methodology in an Industrial Setup., , , , и . DSD, стр. 610-614. IEEE, (2019)