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Disambiguation of "Noel, Jean-Philippe"

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Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology.

, , , , , , , , , , , , , and . ISSCC, page 424-425. IEEE, (2013)

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Jean-Noël Quintin

Jean-Noel Marsat

Jean-Noël Martin

Jean-Philippe Kohl

Jean-Philippe Dubus

 

Other publications of authors with the same name

An Automated Design Methodology for Computational SRAM Dedicated to Highly Data-Centric Applications: Invited Paper., , , , , , , and . SLIP, page 4:1-4:7. ACM, (2022)An Optimal Open-Loop Strategy for Handling a Flexible Beam with a Robot Manipulator., , , , , and . ICRA, page 3168-3174. IEEE, (2023)Storage Class Memory with Computing Row Buffer: A Design Space Exploration., , , , , , , , , and . DATE, page 1-6. IEEE, (2021)Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures., , , , and . NANOARCH, page 7-12. ACM, (2016)High density emerging resistive memories: What are the limits?, , , , and . LASCAS, page 1-4. IEEE, (2017)NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips., , , , , , , , , and 39 other author(s). DATE, page 1-6. IEEE, (2023)Smart instruction codes for in-memory computing architectures compatible with standard SRAM interfaces., , , , and . DATE, page 1634-1639. IEEE, (2018)Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs., , , , , , , , , and 10 other author(s). DATE, page 613-618. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro., , , , , , , , , and 9 other author(s). IMW, page 1-4. IEEE, (2023)Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology., , , , , , and . VLSI-SoC, page 168-173. IEEE, (2013)