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Disambiguation of "Hong, Hyeok-Ki"

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Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC.

, , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (2): 322-332 (2017)

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Sung-Ki Hong

Ki-Chang Hong

Ki-Hong Kwon

Ki-Su Hong

Ki-Hong Kim

 

Other publications of authors with the same name

26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique., , , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 7b 1GS/s 7.2mW nonbinary 2b/cycle SAR ADC with register-to-DAC direct control., , , , , and . CICC, page 1-4. IEEE, (2012)A 65 nm 0.08-to-680 MHz Low-Power Synthesizable MDLL With Nested-Delay Cell and Background Static Phase Offset Calibration., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (3): 281-285 (2018)A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC., , , , , , and . IEEE J. Solid State Circuits, 50 (2): 543-555 (2015)An 8.6 ENOB 900MS/s time-interleaved 2b/cycle SAR ADC with a 1b/cycle reconfiguration for resolution enhancement., , , , , , and . ISSCC, page 470-471. IEEE, (2013)Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (2): 322-332 (2017)A Sign-Equality-Based Background Timing-Mismatch Calibration Algorithm for Time-Interleaved ADCs., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (6): 518-522 (2016)A Time-Interleaved 12-b 270-MS/s SAR ADC With Virtual-Timing-Reference Timing-Skew Calibration Scheme., , , and . IEEE J. Solid State Circuits, 53 (9): 2584-2594 (2018)Ternary-level thermometer C-DAC switching scheme for flash-assisted SAR ADCs., , , , , and . IEICE Electron. Express, 12 (10): 20150302 (2015)A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI-SAR) ADC., , , , , , , , and . IEEE J. Solid State Circuits, 51 (8): 1826-1839 (2016)