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BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W., , , , , , , , , и 1 other автор(ы). IEEE J. Solid State Circuits, 53 (4): 983-994 (2018)Cachet: Low-Overhead Integrity Verification on Metadata Cache in Secure Nonvolatile Memory Systems., и . IEEE Micro, 44 (1): 38-48 (января 2024)Protocomputing Architecture over a Digital Medium Aiming at Real-Time Video Processing., , , , , и . Complex., (2018)Accelerating Decision Tree Ensemble with Guided Branch Approximation., и . HEART, стр. 24-32. ACM, (2022)Towards a Low-Power Accelerator of Many FPGAs for Stencil Computations., , и . ICNC, стр. 343-349. IEEE Computer Society, (2012)FPGA implementation of edge-guided pattern generation for motion-vector estimation of textureless objects., , , , , и . FPL, стр. 1. IEEE, (2017)Ultrasmall: The smallest MIPS soft processor., , , , и . FPL, стр. 1-4. IEEE, (2014)flipSyrup: Cycle-accurate hardware simulation framework on abstract FPGA platforms., и . FPL, стр. 1-4. IEEE, (2014)A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing., , , и . IEICE Trans. Inf. Syst., 101-D (2): 288-302 (2018)MP-GELU Bayesian Neural Networks: Moment Propagation by GELU Nonlinearity., и . CoRR, (2022)