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Disambiguation of "Minami, Toshihiro"

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Architecture and implementation of a highly parallel single-chip video DSP.

, , , and . IEEE Trans. Circuits Syst. Video Technol., 2 (2): 207-220 (1992)

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Toshihiro Muramaki

Kazutomo Minami

Kazutomo Minami

Kichie Minami

Toshihiro Osada

 

Other publications of authors with the same name

A 4: 2: 2P@ML MPEG-2 video encoder board using an enhanced MP@ML video encoder LSI., , , , and . IEEE Trans. Consumer Electronics, 45 (4): 1130-1133 (1999)An Organized Firmware Verification Environment for the Programmable Image DSP., , , , and . ITC, page 1034-1041. IEEE Computer Society, (1991)Two-chip MPEG-2 video encoder., , , , , , , , , and 7 other author(s). IEEE Micro, 16 (2): 51-58 (1996)SuperENC: MPEG-2 video encoder chip., , , , , , , , , and 5 other author(s). IEEE Micro, 19 (4): 56-65 (1999)A real-time motion estimation and compensation LSI with wide search range for MPEG2 video encoding., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 31 (11): 1733-1741 (1996)Architecture and implementation of a highly parallel single-chip video DSP., , , and . IEEE Trans. Circuits Syst. Video Technol., 2 (2): 207-220 (1992)An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture., , , , , , , and . DATE, page 44-. IEEE Computer Society / ACM, (1999)Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level., , , , , , , , , and 3 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 15 (9): 1055-1059 (2007)A highly-parallel single-chip DSP architecture for video signal processing., , , and . ICASSP, page 1197-1200. IEEE Computer Society, (1991)