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Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs.

T. Wu, D. Marcon, B. Jaeger, M. Hove, B. Bakeroot, S. Stoffels, G. Groeseneken, S. Decoutere, and R. Roelofs. IRPS, page 6. IEEE, (2015)

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Bruno Remo Guidotti

Sauter Guido

Curt Guido

Isabella Guido

Luca Guido

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ESD protection diodes in optical interposer technology.R. Boschke, G. Groeseneken, M. Scholz, S. Chen, G. Hellings, P. Verheyen, and D. Linten. ICICDT, page 1-4. IEEE, (2015)NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures.J. Franco, B. Kaczer, P. Roussel, E. Bury, H. Mertens, R. Ritzenthaler, T. Grasser, N. Horiguchi, A. Thean, and G. Groeseneken. IRPS, page 2. IEEE, (2015)Transient voltage overshoot in TLP testing - Real or artifact?D. Trémouilles, S. Thijs, P. Roussel, M. Natarajan, V. Vassilev, and G. Groeseneken. Microelectron. Reliab., 47 (7): 1016-1024 (2007)Gate oxide breakdown in FET devices and circuits: From nanoscale physics to system-level reliability.B. Kaczer, R. Degraeve, P. Roussel, and G. Groeseneken. Microelectron. Reliab., 47 (4-5): 559-566 (2007)Understanding the memory window in 1T-FeFET memories: a depolarization field perspective.K. Kaczmarek, M. Bardon, Y. Xiang, L. Breuil, N. Ronchi, B. Parvais, G. Groeseneken, and J. Houdt. IMW, page 1-4. IEEE, (2021)Physics-based device aging modelling framework for accurate circuit reliability assessment.Z. Wu, J. Franco, B. Truijen, P. Roussel, S. Tyaginov, M. Vandemaele, E. Bury, G. Groeseneken, D. Linten, and B. Kaczer. IRPS, page 1-6. IEEE, (2021)Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology.H. Kukner, M. Khatib, S. Morrison, P. Weckx, P. Raghavan, B. Kaczer, F. Catthoor, L. der Perre, R. Lauwereins, and G. Groeseneken. ISQED, page 473-479. IEEE, (2014)Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps.V. Putcha, J. Franco, A. Vais, B. Kaczer, S. Sioncke, D. Linten, and G. Groeseneken. IRPS, page 5. IEEE, (2018)The Influence of Gate Bias on the Anneal of Hot-Carrier Degradation.M. Vandemaele, K. Chuang, E. Bury, S. Tyaginov, G. Groeseneken, and B. Kaczer. IRPS, page 1-7. IEEE, (2020)Significance of the failure criterion on transmission line pulse testing.B. Keppens, V. Heyn, M. Iyer, V. Vassilev, and G. Groeseneken. Microelectron. Reliab., 42 (6): 901-907 (2002)

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Disambiguation of "Groeseneken, Guido"

Please choose a person to relate this publication to

Bruno Remo Guidotti

Sauter Guido

Curt Guido

Isabella Guido

Luca Guido

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Groeseneken, Guido"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs.

Please choose a person to relate this publication to

Bruno Remo Guidotti

Sauter Guido

Curt Guido

Isabella Guido

Luca Guido

Other publications of authors with the same name

Disambiguation