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Novel hazard-free majority voter for n-modular redundancy-based fault tolerance in asynchronous circuits., и . IET Comput. Digit. Tech., 5 (4): 306-315 (2011)Dynamic Scan Chain Partitioning for Reducing Peak Shift Power During Test., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (2): 298-302 (2009)Low-cost, software-based self-test methodologies for performance faults in processor control subsystems., , и . CICC, стр. 263-266. IEEE, (2001)On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD., , , и . IOLTS, стр. 123-128. IEEE Computer Society, (2008)Concurrent Error Detection for Combinational and Sequential Logic via Output Compaction., , и . ISQED, стр. 459-464. IEEE Computer Society, (2004)Concurrent Error Detection in Asynchronous Burst-Mode Controllers., и . DATE, стр. 1272-1277. IEEE Computer Society, (2005)Faults in Processor Control Subsystems: Testing Correctness and Performance Faults in the Data Prefetching Unit., , и . Asian Test Symposium, стр. 319-324. IEEE Computer Society, (2001)Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines., и . IEEE Trans. Computers, 56 (6): 785-798 (2007)Peak Power Reduction Through Dynamic Partitioning of Scan Chains., и . ITC, стр. 1-10. IEEE Computer Society, (2008)Predictive analysis for projecting test compression levels., и . ITC, стр. 275-284. IEEE Computer Society, (2010)