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High performance scalable hardware SOM architecture for real-time vector quantization., , и . IPAS, стр. 256-261. IEEE, (2018)State-Space Simulation of Electric Arc Faults., , , и . IEEE Trans. Aerosp. Electron. Syst., 58 (3): 1650-1659 (2022)Scalable, dynamic and growing hardware self-organizing architecture for real-time vector quantization., , , , и . ICECS, стр. 1-4. IEEE, (2020)Cluster-Based Hybrid Reconfigurable Architecture for Auto-adaptive SoC., , и . ICECS, стр. 979-982. IEEE, (2007)A Multi-Application, Scalable and Adaptable Hardware SOM Architecture., , , , и . IJCNN, стр. 1-8. IEEE, (2019)Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design., , , и . IPDPS, стр. 178. IEEE Computer Society, (2003)VLSI Architecture and FPGA Implementation of a Hybrid Message-Embedded Self-Synchronizing Stream Cipher., , , , и . DELTA, стр. 386-389. IEEE Computer Society, (2008)Linear array processors with multiple access modes memory for real-time image processing., , , , и . APCCAS (1), стр. 203-206. IEEE, (2002)SIMD/restricted MIMD parallel architecture for Image Processing Based on a New Design of a Multi-mode Access Memory., , , и . PDPTA, стр. 567-570. CSREA Press, (1999)A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems., , , и . EURASIP J. Adv. Signal Process., 2003 (6): 494-501 (2003)