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s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies.

M. Raj, C. Xie, A. Bekele, A. Chou, W. Zhang, Y. Cao, J. Kim, N. Narang, H. Zhao, Y. Wang, K. Tan, W. Lin, J. Im, D. Mahashin, S. Asuncion, P. Upadhyaya, and Y. Frans. ISSCC, page 204-205. IEEE, (2023)

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Bekele Megerssa

Rahel Bekele

Mekonnen Bekele

Dorothee Ade

Other publications of authors with the same name

A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET.J. Im, K. Zheng, C. Chou, L. Zhou, J. Kim, S. Chen, Y. Wang, H. Hung, K. Tan, W. Lin and 11 other author(s). IEEE J. Solid State Circuits, 56 (1): 7-18 (2021)3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS.P. Upadhyaya, J. Savoj, F. An, A. Bekele, A. Jose, B. Xu, Z. Wu, D. Turker, H. Aslanzadeh, H. Hedayati and 6 other author(s). ISSCC, page 1-3. IEEE, (2015)A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS.J. Savoj, K. Hsieh, P. Upadhyaya, F. An, A. Bekele, S. Chen, X. Jiang, K. Lai, C. Poon, A. Sewani and 6 other author(s). VLSIC, page 104-105. IEEE, (2012)A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies.M. Raj, C. Xie, A. Bekele, A. Chou, W. Zhang, Y. Cao, J. Kim, N. Narang, H. Zhao, Y. Wang and 7 other author(s). ISSCC, page 204-205. IEEE, (2023)A 0.5-28GB/S Wireline Tranceiver with 15-Tap DFE and Fast-Locking Digital CDR in 7NM FinFET.J. Im, S. Chen, D. Freitas, A. Chou, L. Zhou, I. Zhuang, T. Cronin, D. Mahashin, W. Lin, K. Chan and 7 other author(s). VLSI Circuits, page 145-146. IEEE, (2018)6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET.J. Im, K. Zheng, A. Chou, L. Zhou, J. Kim, S. Chen, Y. Wang, H. Hung, K. Tan, W. Lin and 11 other author(s). ISSCC, page 116-118. IEEE, (2020)A 7.4-to-14GHz PLL with 54fsrms jitter in 16nm FinFET for integrated RF-data-converter SoCs.D. Turker, A. Bekele, P. Upadhyaya, B. Verbruggen, Y. Cao, S. Ma, C. Erdmann, B. Farley, Y. Frans, and K. Chang. ISSCC, page 378-380. IEEE, (2018)A fully-adaptive wideband 0.5-32.75Gb/s FPGA transceiver in 16nm FinFET CMOS technology.P. Upadhyaya, A. Bekele, D. Melek, H. Zhao, J. Im, J. Cho, K. Tan, S. McLeod, S. Chen, W. Zhang and 2 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)

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A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies.

Please choose a person to relate this publication to

Bekele Megerssa

Bekele Megerssa

Rahel Bekele

Mekonnen Bekele

Dorothee Ade

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Bekele, Ade"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies.

Please choose a person to relate this publication to

Bekele Megerssa

Bekele Megerssa

Rahel Bekele

Mekonnen Bekele

Dorothee Ade

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies.