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Adaptive Clock Generation Technique for Variation-Aware Subthreshold Logics., , и . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (9): 587-591 (2012)Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering., , , , , , и . J. Signal Process. Syst., 58 (2): 125-137 (2010)Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision., , , , и . DAC, стр. 1-6. IEEE, (2020)Wearables, Implants, and Internet of Things: The Technology Needs in the Evolving Landscape., , и . IEEE Trans. Multi Scale Comput. Syst., 2 (2): 123-128 (2016)Overview of Circuits, Systems, and Applications of Spintronics., , , , , , , , , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 265-278 (2016)A distributed MAC design for data collision-free wireless USB home networks., , , и . IEEE Trans. Consumer Electronics, 55 (3): 1337-1343 (2009)Bit-width reduction and customized register for low cost convolutional neural network accelerator., , , и . ISLPED, стр. 1-6. IEEE, (2017)Spin Orbit Torque-RAM Write Energy Reduction with Self-Verification Scheme., и . ISOCC, стр. 19-20. IEEE, (2018)A Perspective on Test Methodologies for Supervised Machine Learning Accelerators., , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (3): 562-569 (2019)Low Cost Hardware Implementation of LEA-128 Encryption using Bit-Serial Technique., , и . ISOCC, стр. 46-47. IEEE, (2018)