Author of the publication

Low-power multi-sensor system with normally-off sensing technology for IoT applications.

, , , and . ISOCC, page 195-196. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Scalable Massively Parallel Processor for Real-Time Image Processing., , , , , , , , , and 9 other author(s). IEEE J. Solid State Circuits, 46 (10): 2363-2373 (2011)A soft-error-immune maintenance-free TCAM architecture with associated embedded DRAM., , , and . CICC, page 451-454. IEEE, (2005)A Study of Sense-Voltage Margins in Low-Voltage-Operating Embedded DRAM Macros., , , , , , , , , and 2 other author(s). IEICE Trans. Electron., 88-C (10): 2020-2027 (2005)A Configurable Enhanced TTRAM Macro for System-Level Power Management Unified Memory., , , , , , , and . IEEE J. Solid State Circuits, 42 (4): 853-861 (2007)Low-power multi-sensor system with task scheduling and autonomous standby mode transition control for IoT applications., , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2017)Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine., , , , , , , and . ISCAS, page 525-528. IEEE, (2007)CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table image coding example., , , , , , , and . ISCAS (5), page 5202-5205. IEEE, (2005)A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 40 (1): 245-253 (2005)The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 42 (1): 183-192 (2007)3.5 A 40nm flash microcontroller with 0.80µs field-oriented-control intelligent motor timer and functional safety system for next-generation EV/HEV., , , , , , , , , and 2 other author(s). ISSCC, page 58-59. IEEE, (2017)