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Self-Calibrated Energy-Efficient and Reliable Channels for On-Chip Interconnection Networks.

, and . J. Electr. Comput. Eng., (2012)

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Low temperature (<180 °C) bonding for 3D integration., , , , , , , , , and 1 other author(s). 3DIC, page 1-5. IEEE, (2013)An Energy-Efficient Accelerator with Relative- Indexing Memory for Sparse Compressed Convolutional Neural Network., , , and . AICAS, page 42-45. IEEE, (2019)All Digital Linear Voltage Regulator for Super- to Near-Threshold Operation., and . IEEE Trans. Very Large Scale Integr. Syst., 20 (6): 989-1001 (2012)Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory., , and . APCCAS, page 1301-1304. IEEE, (2006)Area-power-efficient 11-bit hybrid dual-Vdd ADC with self-calibration for neural sensing application., , , , and . SoCC, page 18-23. IEEE, (2016)On-demand memory sub-system for multi-core SoCs., , and . SoCC, page 122-127. IEEE, (2011)An energy-efficient 10T SRAM-based FIFO memory operating in near-/sub-threshold regions., , , and . SoCC, page 19-23. IEEE, (2011)A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control., , , , , , , , , and 9 other author(s). SoCC, page 197-200. IEEE, (2011)All digitally controlled linear voltage regulator with PMOS strength self-calibration for ripple reduction., , , , , , and . VLSI-DAT, page 1-4. IEEE, (2015)A fully-differential subthreshold SRAM cell with auto-compensation., and . APCCAS, page 1771-1774. IEEE, (2008)