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Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.

G. der Plas, P. Limaye, I. Loi, A. Mercha, H. Oprins, C. Torregiani, S. Thijs, D. Linten, M. Stucchi, G. Katti, D. Velenis, V. Cherman, B. Vandevelde, V. Simons, I. Wolf, R. Labie, D. Perry, S. Bronckers, N. Minas, M. Cupac, W. Ruythooren, J. Olmen, A. Phommahaxay, M. de Potter de ten Broeck, A. Opdebeeck, M. Rakowski, B. Wachter, M. Dehan, M. Nelis, R. Agarwal, A. Pullini, F. Angiolini, L. Benini, W. Dehaene, Y. Travaly, E. Beyne, and P. Marchal. IEEE J. Solid State Circuits, 46 (1): 293-307 (2011)

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Gabriel Morin

Helga Morin

Dieter Morin

Rudy Morin

Luce Morin

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A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS.J. Borremans, A. Bevilacqua, S. Bronckers, M. Dehan, M. Kuijk, P. Wambacq, and J. Craninckx. IEEE J. Solid State Circuits, 43 (12): 2693-2705 (2008)STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process.D. Jang, M. Bardon, D. Yakimets, K. Miyaguchi, A. Keersgieter, T. Chiarella, R. Ritzenthaler, M. Dehan, and A. Mercha. ESSDERC, page 159-162. IEEE, (2013)Low-cost feedback-enabled LNAs in 45nm CMOS.J. Borremans, S. Thijs, M. Dehan, A. Mercha, and P. Wambacq. ESSCIRC, page 100-103. IEEE, (2009)Identifying the Bottlenecks to the RF Performance of FinFETs.V. Subramanian, A. Mercha, B. Parvais, M. Dehan, G. Groeseneken, W. Sansen, and S. Decoutere. VLSI Design, page 111-116. IEEE Computer Society, (2010)Impact of fin shape variability on device performance towards 10nm node.K. Tomida, K. Hiraga, M. Dehan, G. Hellings, D. Jang, K. Miyaguchi, T. Chiarella, M. Kim, A. Mocuta, N. Horiguchi and 3 other author(s). ICICDT, page 1-4. IEEE, (2015)The Potential of FinFETs for Analog and RF Circuit Applications.P. Wambacq, B. Verbruggen, K. Scheir, J. Borremans, M. Dehan, D. Linten, V. Heyn, G. der Plas, A. Mercha, B. Parvais and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (11): 2541-2551 (2007)Design issues and considerations for low-cost 3D TSV IC technology.G. der Plas, P. Limaye, A. Mercha, H. Oprins, C. Torregiani, S. Thijs, D. Linten, M. Stucchi, G. Katti, D. Velenis and 24 other author(s). ISSCC, page 148-149. IEEE, (2010)FinFET RF receiver building blocks operating above 10 GHz.D. Siprak, P. Wambacq, B. Parvais, A. Mercha, M. Fulde, J. Kruger, M. Dehan, and S. Decoutere. ESSCIRC, page 360-363. IEEE, (2009)Towards high performance sub-10nm finW bulk FinFET technology.T. Chiarella, S. Kubicek, E. Rosseel, R. Ritzenthaler, A. Hikavyy, P. Eyben, A. Keersgieter, L. Ragnarsson, M. Kim, S. Chew and 10 other author(s). ESSDERC, page 131-134. IEEE, (2016)FinFET technology for analog and RF circuits.B. Parvais, V. Subramanian, A. Mercha, M. Dehan, P. Wambacq, W. Sansen, G. Groeseneken, and S. Decoutere. ICECS, page 182-185. IEEE, (2007)

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Disambiguation of "Dehan, Morin"

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Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.

Please choose a person to relate this publication to

Gabriel Morin

Helga Morin

Dieter Morin

Rudy Morin

Luce Morin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Dehan, Morin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.

Please choose a person to relate this publication to

Gabriel Morin

Helga Morin

Dieter Morin

Rudy Morin

Luce Morin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.