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Disambiguation of "Kawano, Yoichi"

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300-GHz Amplifier in 75-nm InP HEMT Technology.

, , , , , , , , , and . IEICE Trans. Electron., 99-C (5): 528-534 (2016)

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Yoichi Kiuchi

Yoichi Otani

Yoichi Ishikawa

 

Other publications of authors with the same name

A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 49 (12): 2915-2924 (2014)Robust Q-Band InP- and GaN-HEMT Low Noise Amplifiers., , , , , , , and . IEICE Trans. Electron., 100-C (5): 417-423 (2017)3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE., , , , , , , , , and 5 other author(s). ISSCC, page 60-61. IEEE, (2014)W-band ultra-high data-rate 65nm CMOS wireless transceiver., , , , , , , , and . ASP-DAC, page 5-6. IEEE, (2017)13.3 A 56Gb/s W-band CMOS wireless transceiver., , , , , , , , , and 8 other author(s). ISSCC, page 242-243. IEEE, (2016)A 120Gb/s 16QAM CMOS millimeter-wave wireless transceiver., , , , , , , , , and 2 other author(s). ISSCC, page 168-170. IEEE, (2018)A fully integrated triple-band CMOS power amplifier for WCDMA mobile handsets., , , , , , , , , and 10 other author(s). ISSCC, page 86-88. IEEE, (2012)A 50-Gbit/s 450-mW Full-Rate 4: 1 Multiplexer With Multiphase Clock Architecture in 0.13-µm InP HEMT Technology., , , , , , and . IEEE J. Solid State Circuits, 42 (3): 637-646 (2007)A 24 dB Gain 51-68 GHz Common Source Low Noise Amplifier Using Asymmetric-Layout Transistors., , , , , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 95-A (2): 498-505 (2012)60 and 77GHz Power Amplifiers in Standard 90nm CMOS., , , , and . ISSCC, page 562-563. IEEE, (2008)