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Disambiguation of "Huang, Po-Chiun"

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An implantable microsystem for studying the Parkinson's Disease.

, , , , , , , , , , , and . APCCAS, page 92-95. IEEE, (2012)

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Po-Cheng Huang

Po Leung

Tau-Chiun Wu

Wen-Po Lee

Olga Po tulková

 

Other publications of authors with the same name

An implantable microsystem for studying the Parkinson's Disease., , , , , , , , , and 2 other author(s). APCCAS, page 92-95. IEEE, (2012)A 0.24 to 2.4 GHz phase-locked loop with low supply sensitivity in 0.18-µm CMOS., , , , and . ISCAS, page 981-984. IEEE, (2011)A 90nm CMOS, 5.6ps, 0.23pJ/code time-to-digital converter with multipath oscillator and seamless cycle detection., , , and . A-SSCC, page 357-360. IEEE, (2011)A scalable direct-sampling broadband radar receiver supporting simultaneous digital multibeam array in 65nm CMOS., , , and . ISSCC, page 242-243. IEEE, (2013)An implantable microsystem for long-term study on the mechanism of deep brain stimulation., , , , , , , , and . BioCAS, page 274-277. IEEE, (2013)Cooperation between Distributed Power Modules for SoC Power Management., , and . IEICE Trans. Electron., 99-C (6): 606-613 (2016)A 1-V CMOS Pseudo-Differential Amplifier With Multiple Common-Mode Stabilization and Frequency Compensation Loops., , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (5): 409-413 (2008)An Integrated Linear Regulator With Fast Output Voltage Transition for Dual-Supply SRAMs in DVFS Systems., , and . IEEE J. Solid State Circuits, 45 (11): 2239-2249 (2010)A 0.003 mm2 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching., , , , , , , , and . IEEE J. Solid State Circuits, 50 (6): 1382-1398 (2015)AF-Test: Adaptive-Frequency Scan Test Methodology for Small-Delay Defects., , , , , , , , , and 2 other author(s). DFT, page 340-348. IEEE Computer Society, (2010)