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Disambiguation of "Soudris, Dimitrios"

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A Novel Division Algorithm and Architectures for Parallel and Sequential Processing.

, , , and . J. Circuits Syst. Comput., 14 (2): 281-296 (2005)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dimitrios Papanastasiou

Dimitrios Tourpalis

Dimitrios Moulalis

Dimitrios Tassiopoulos

Dimitrios Dadaliaris

 

Other publications of authors with the same name

Trading Fault-Masking with Performance Overhead for FPGAs., and . ARCS Workshops, VDE-Verlag, (2011)A reusable IP FFT core for DSP applications., , , , , , and . ISCAS (3), page 621-624. IEEE, (2004)Understanding timing impact of BTI/RTN with massively threaded atomistic transient simulations., , , , and . ICICDT, page 1-4. IEEE, (2014)On the implementation of a baseband processor for a portable dual mode DECT/GSM terminal., , , and . ISCAS (4), page 334-337. IEEE, (2001)Accuracy of Quasi-Monte Carlo technique in failure probability estimations., , , , and . ICICDT, page 1-4. IEEE, (2016)A Process-based Reconfigurable SystemC Module for simulation speedup., , , and . ICSAMOS, page 72-79. IEEE, (2013)A low-cost fault tolerant solution targeting commercial FPGA devices., and . J. Syst. Archit., 59 (10-D): 1255-1265 (2013)FPGA Acceleration of Approximate KNN Indexing on High- Dimensional Vectors., , and . ReCoSoC, page 59-65. IEEE, (2019)A Power-Aware Placement and Routing Algorithm Targeting 3D FPGAs., and . J. Low Power Electron., 4 (3): 275-289 (2008)A Framework for Interconnection-Aware Domain-Specific Many-Accelerator Synthesis., , , , and . ACM Trans. Embed. Comput. Syst., 16 (1): 8:1-8:26 (2016)