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Disambiguation of "Galivanche, Rajesh"

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Test Challenges in Nanometer Technologies.

, , , and . J. Electron. Test., 17 (3-4): 209-218 (2001)

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Rajesh Saiju

Hybrid Power System Modelling - Simulation and Energy Management Unit Development. Uni Kassel, (2008)

Rajesh Chitta

Rajesh Saiju

Rajesh Narasimha

Rajesh Kolli

 

Other publications of authors with the same name

Global Signal Vulnerability (GSV) Analysis for Selective State Element Hardening in Modern Microprocessors., , , and . IEEE Trans. Computers, 61 (10): 1361-1370 (2012)Test Roles in Diagnosis and Silicon Debug., , , , , , and . ATS, page 367. IEEE, (2007)A low-cost concurrent error detection technique for processor control logic., , , , and . DATE, page 897-902. ACM, (2008)Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (1): 238-246 (2017)Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder., , , , , and . J. Electron. Test., 29 (3): 401-413 (2013)Session Abstract., and . VTS, page 422-423. IEEE Computer Society, (2006)Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems., and . IEEE Trans. Computers, 60 (9): 1217-1218 (2011)Testing in the year 2020., , and . DATE, page 960-965. EDA Consortium, San Jose, CA, USA, (2007)Path coverage based functional test generation for processor marginality validation., , , and . ITC, page 544-552. IEEE Computer Society, (2010)Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic., , , , and . ETS, page 171-176. IEEE Computer Society, (2008)