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Disambiguation of "Beyer, Gerald"

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Continuity and reliability assessment of a scalable 3×50μm and 2×40μm via-middle TSV module.

, , , , , , , , , , , , and . 3DIC, page 1-4. IEEE, (2016)

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Gerald Beyer

Susanne Beyer

Helene Beyer

Alexander Beyer

Lioba Beyer

 

Other publications of authors with the same name

Reliability challenges for barrier/liner system in high aspect ratio through silicon vias., , , , , , , , , and . Microelectron. Reliab., 54 (9-10): 1949-1952 (2014)Die to wafer 3D stacking for below 10um pitch microbumps., , , , , , , , , and 8 other author(s). 3DIC, page 1-4. IEEE, (2016)Analysis of microbump induced stress effects in 3D stacked IC technologies., , , , , , , , , and 9 other author(s). 3DIC, page 1-5. IEEE, (2011)Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails., , , , , , , , , and 34 other author(s). VLSI Technology and Circuits, page 284-285. IEEE, (2022)In-line metrology and inspection for process control during 3D stacking of IC's., , , , , , , and . 3DIC, page 1-4. IEEE, (2011)Permanent wafer bonding in the low temperature by using various plasma enhanced chemical vapour deposition dielectrics., , , , , and . 3DIC, page TS7.2.1-TS7.2.4. IEEE, (2015)Extreme wafer thinning optimization for via-last applications., , , , , , , , , and 3 other author(s). 3DIC, page 1-5. IEEE, (2016)3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps., , , , , , , , , and 9 other author(s). ICICDT, page 1-4. IEEE, (2012)Nano-Through Silicon Vias (nTSV) for Backside Power Delivery Networks (BSPDN)., , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)3D stacking using Cu-Cu direct bonding., , , , , , , , and . 3DIC, page 1-4. IEEE, (2011)