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A novel states recovery technique for the TMR softcore processor., , , , , and . FPL, page 543-546. IEEE, (2009)A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)., , , , , and . FPGA, page 271. ACM, (2013)An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture., , , , and . Int. J. Reconfigurable Comput., (2008)A 3D FPGA Architecture to Realize Simple Die Stacking., , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2015)Improving the Soft-error Tolerability of a Soft-core Processor on., , , , and . J. Next Gener. Inf. Technol., 2 (3): 35-48 (2011)Evaluation of fault tolerant technique based on homogeneous FPGA architecture., , , , , and . VLSI-SoC, page 225-230. IEEE, (2012)Capabilities of Deep Learning Models on Learning Physical Relationships: Case of Rainfall-Runoff Modeling with LSTM., , , , , , and . CoRR, (2021)An Easily Testable Routing Architecture and Efficient Test Technique., , , , and . FPL, page 291-294. IEEE Computer Society, (2011)Image Search System Based on Feature Vectors of Convolutional Neural Network., , and . TENCON, page 934-939. IEEE, (2020)Fault Recovery Technique for TMR Softcore Processor System Using Partial Reconfiguration., , , , , , and . ICA3PP (1), volume 7439 of Lecture Notes in Computer Science, page 392-404. Springer, (2012)