( en | de | ru )

 

Disambiguation of "Fujimori, Ichiro"

Author of the publication

copydeleteadd this publication to your clipboard
19.1 A 0.5-to-9.5GHz 1.2µs-lock-time fractional-N DPLL with ±1.25% UI period jitter in 16nm CMOS for dynamic frequency and core-count scaling in SoC.

, , , , , , , and . ISSCC, page 324-325. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Temmyo Ichiro

Ichiro Yamaguchi

Yuichi Fujimori

Ichiro Tamura

Ichiro Yamaguchi

 

Other publications of authors with the same name

19.1 A 0.5-to-9.5GHz 1.2µs-lock-time fractional-N DPLL with ±1.25% UI period jitter in 16nm CMOS for dynamic frequency and core-count scaling in SoC., , , , , , , and . ISSCC, page 324-325. IEEE, (2016)F1: High-speed interleaved ADCs., , , and . ISSCC, page 1-2. IEEE, (2015)A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS., , , , , , and . IEEE J. Solid State Circuits, 50 (4): 856-866 (2015)F4: Emerging short-reach and high-density interconnect solutions for internet of everything., , , , , and . ISSCC, page 502-505. IEEE, (2016)Session 7 overview: Optical transceivers and silicon photonics., and . ISSCC, page 114-115. IEEE, (2013)A 0.5-9.5-GHz, 1.2-µs Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling., , , , , , , and . IEEE J. Solid State Circuits, 52 (1): 21-32 (2017)A fully integrated SONET OC-48 transceiver in standard CMOS., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 36 (12): 1964-1973 (2001)A 2.7GHz to 7GHz fractional-N LCPLL utilizing multimetal layer SoC technology in 28nm CMOS., , , , , , and . VLSIC, page 1-2. IEEE, (2014)A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter., and . IEEE J. Solid State Circuits, 33 (12): 1863-1870 (1998)OC-192 transmitter and receiver in standard 0.18-μm CMOS., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 37 (12): 1768-1780 (2002)