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Supply current testing of open defects at interconnects in 3D Ics with IEEE 1149.1 architecture., , и . 3DIC, стр. 1-6. IEEE, (2011)Electric field for detecting open leads in CMOS logic circuits by supply current testing., , , и . ISCAS (3), стр. 2995-2998. IEEE, (2005)A supply current testable register string DAC of decoder type., , , и . ISCIT, стр. 58-63. IEEE, (2011)Sequential Redundancy Removal Using Test Generation and Multiple Unreachable States., , , и . Asian Test Symposium, стр. 23-. IEEE Computer Society, (2001)Fault-Aware Page Address Remapping Techniques for Enhancing Yield and Reliability of Flash Memories., , , и . ATS, стр. 254-259. IEEE Computer Society, (2017)Open Defect Detection with a Built-in Test Circuit by IDDT Appearance Time in CMOS ICs., , , , и . ATS, стр. 242-247. IEEE Computer Society, (2017)Testability Analysis of IDDQ Testing with Large Threshold Value., , , и . DFT, стр. 367-375. IEEE Computer Society, (2000)Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field., , , , и . DELTA, стр. 387-391. IEEE Computer Society, (2002)On Detecting Delay Faults Using Time-to-Digital Converter Embedded in Boundary Scan., , , и . IEICE Trans. Inf. Syst., 96-D (9): 1986-1993 (2013)Identification and Frequency Estimation of Feedback Bridging Faults Generating Logical Oscillation in CMOS Circuits., , и . IEICE Trans. Inf. Syst., 87-D (3): 571-579 (2004)