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NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs.

D. Ghosh, S. Nandy, K. Parthasarathy, and V. Visvanathan. VLSI Design, page 341-346. IEEE Computer Society, (1993)

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Constanze Nandy

Chong-hy S k

Han-gil S k

i-s k Pak

Sagnik Nandy

Other publications of authors with the same name

Symmetric Convolutional Filters: A Novel Way to Constrain Parameters in CNN.H. Agrawal, S. T., and S. Nandy. CoRR, (2022)REDEFINE: Runtime reconfigurable polymorphic ASIC.M. Alle, K. Varadarajan, A. Fell, C. Reddy, J. Nimmy, S. Das, P. Biswas, J. Chetia, A. Rao, S. Nandy and 1 other author(s). ACM Trans. Embed. Comput. Syst., 9 (2): 11:1-11:48 (2009)Factorization of Boolean Polynomials: Parallel Algorithms and Experimental Evaluation.P. Emelyanov, M. C, V. Kulkarni, S. Nandy, D. Ponomaryov, and S. Raha. Program. Comput. Softw., 47 (2): 108-118 (2021)Signal compression through spatial frequency-based motion estimation.V. Menezes, S. Nandy, and B. Mitra. Integr., 22 (1-2): 115-135 (1997)Accelerating BLAS and LAPACK via Efficient Floating Point Architecture Design.F. Merchant, A. Chattopadhyay, S. Raha, S. Nandy, and R. Narayan. Parallel Process. Lett., 27 (3-4): 1750006:1-1750006:17 (2017)A computational engine for multirate FIR digital filtering.S. Ramanathan, V. Visvanathan, and S. Nandy. Signal Process., 79 (2): 213-222 (1999)Router Attack toward NoC-enabled MPSoC and Monitoring Countermeasures against such Threat.A. Biswas, S. Nandy, and R. Narayan. Circuits Syst. Signal Process., 34 (10): 3241-3290 (2015)Quasi dynamic approach to layout compaction.S. Balakrishnan, and S. Nandy. Microprocessing and Microprogramming, 30 (1-5): 231-236 (1990)Low-Power Hierarchical Scan Test for Multiple Clock Domains.A. Senthil, C. Ravikumar, and S. Nandy. J. Low Power Electron., 3 (1): 106-118 (2007)Energy Aware Synthesis of Application Kernels Expressed in Functional Languages on a Coarse Grained Composable Reconfigurable Array.N. Sivanandan, K. Madhu, S. Das, S. Nandy, and R. Narayan. iNIS, page 7-12. IEEE, (2015)

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Disambiguation of "Nandy, S. K."

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NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs.

Please choose a person to relate this publication to

Constanze Nandy

Chong-hy S k

Han-gil S k

i-s k Pak

Sagnik Nandy

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Nandy, S. K."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs.

Please choose a person to relate this publication to

Constanze Nandy

Chong-hy S k

Han-gil S k

i-s k Pak

Sagnik Nandy

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs.