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A 340 mV-to-0.9 V 20.2 Tb/s Source-Synchronous Hybrid Packet/Circuit-Switched 16 × 16 Network-on-Chip in 22 nm Tri-Gate CMOS.

, , , , , , , , , and . IEEE J. Solid State Circuits, 50 (1): 59-67 (2015)

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