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Disambiguation of "Shibasaki, Takayuki"

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6.6 A 22.5-to-32Gb/s 3.2pJ/b referenceless baud-rate digital CDR with DFE and CTLE in 28nm CMOS.

, , , , , , and . ISSCC, page 120-121. IEEE, (2017)

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Takayuki Sugimoto

Takayuki Sugimoto

Takayuki Shindo

Fumikazu Shibasaki

Takayuki Saito

 

Other publications of authors with the same name

22.7 4×25.78Gb/s retimer ICs for optical links in 0.13μm SiGe BiCMOS., , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)24 to 34-Gb/s ×4 multi-rate VCSEL-based optical transceiver with referenceless CDR., , , , , , , , and . OFC, page 1-3. IEEE, (2016)22.8 A 24-to-35Gb/s x4 VCSEL driver IC with multi-rate referenceless CDR in 0.13um SiGe BiCMOS., , , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 60-GHz 1.65mW 25.9% locking range multi-order LC oscillator based injection locked frequency divider in 65nm CMOS., , , , , , and . CICC, page 1-4. IEEE, (2010)A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS., , , , , , , , , and 10 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)25.78-Gb/s VCSEL-based optical transceiver with retimer-embedded driver and receiver ICs., , , , , , , , and . OFC, page 1-3. IEEE, (2015)A 30Gb/s 2x Half-Baud-Rate CDR., , , , , and . CICC, page 1-4. IEEE, (2019)Session 6 overview: Ultra-high-speed wireline., , and . ISSCC, page 108-109. IEEE, (2017)A single-40Gb/s dual-20Gb/s serializer IC with SFI-5.2 interface in 65nm CMOS., , , , , , , , , and 8 other author(s). ISSCC, page 360-361. IEEE, (2009)32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS., , , , , , , , , and 1 other author(s). ISSCC, page 36-37. IEEE, (2013)