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Disambiguation of "Wong, S. Simon"

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Analysis and Design of a Passive Switched-Capacitor Matrix Multiplier for Approximate Computing.

, and . CoRR, (2016)

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Simon S Lee

Walter Wong

Limsoon Wong

Hoi-Ming Wong

Yasert Wongthonglua

 

Other publications of authors with the same name

Impact of III-V and Ge Devices on Circuit Performance., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (7): 1189-1200 (2013)Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design., , , , , and . IEEE J. Solid State Circuits, 36 (10): 1480-1488 (2001)24.2 A 2.5GHz 7.7TOPS/W switched-capacitor matrix multiplier with co-designed local memory in 40nm., and . ISSCC, page 418-419. IEEE, (2016)Analysis and Design of a Passive Switched-Capacitor Matrix Multiplier for Approximate Computing., and . CoRR, (2016)Nonvolatile 3D-FPGA with monolithically stacked RRAM-based configuration memory., , , , and . ISSCC, page 406-408. IEEE, (2012)Deep COVID DeteCT: an international experience on COVID-19 lung detection and prognosis using chest CT., , , , , , , , , and 19 other author(s). npj Digit. Medicine, (2021)Reduction of Inductive Crosstalk Using Quadrupole Inductors., , , and . IEEE J. Solid State Circuits, 44 (6): 1756-1764 (2009)Performance Benefits of Monolithically Stacked 3-D FPGA., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (2): 216-229 (2007)TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (4): 521-534 (2016)Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (9): 907-911 (2008)