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Disambiguation of "Cevrero, Alessandro"

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Adaptive high-speed and ultra-low power optical interconnect for data center communications.

, , , , , , , and . ICTON, page 1-4. IEEE, (2017)

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Alessandro Valeri

Fluorescence resonance energy transfer between multiple chromophores studied by single-molecule spectroscopy. Uni Düsseldorf, (2009)

Alessandro Nova

Alessandro Zivelonghi

Alessandro Mirizzi

Alessandro Topa

 

Other publications of authors with the same name

Impact of data serialization over TSVs on routing congestion in 3D-stacked multi-core processors., , , and . Microelectron. J., (2016)A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 53 (4): 1227-1237 (2018)A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (12): 3458-3473 (2017)A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET., , , , , , , , , and 5 other author(s). ISSCC, page 476-478. IEEE, (2019)Background calibration using noisy reference ADC for a 12 b 600 MS/s 2 × TI SAR ADC in 14nm CMOS FinFET., , , , , , , , , and 2 other author(s). ESSCIRC, page 183-186. IEEE, (2017)A 12-bit 300-MS/s SAR ADC With Inverter-Based Preamplifier and Common-Mode-Regulation DAC in 14-nm CMOS FinFET., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 53 (11): 3268-3279 (2018)Design space exploration for field programmable compressor trees., , , , , , and . CASES, page 207-216. ACM, (2008)Design and analysis of jitter-aware low-power and high-speed TSV link for 3D ICs., , , , and . Microelectron. J., (2016)3D serial TSV link for low-power chip-to-chip communication., , , and . ICICDT, page 1-4. IEEE, (2014)A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET., , , , , , , , , and 1 other author(s). ISSCC, page 112-114. IEEE, (2019)