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Другие публикации лиц с тем же именем

Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design., , , и . IEEE Trans. Very Large Scale Integr. Syst., 26 (3): 445-456 (2018)Framework for Rapid Performance Estimation of Embedded Soft Core Processors., , , и . ACM Trans. Reconfigurable Technol. Syst., 11 (2): 9:1-9:21 (2018)Design Space exploration of FPGA-based accelerators with multi-level parallelism., , , , , и . DATE, стр. 1141-1146. IEEE, (2017)Custom instructions with local memory elements without expensive DMA transfers., , и . FPL, стр. 647-650. IEEE, (2012)Hybrid Genetic Algorithm for an On-Demand First Mile Transit System Using Electric Vehicles., , , и . ICCS (1), том 10860 из Lecture Notes in Computer Science, стр. 98-113. Springer, (2018)Communication-Aware Module Placement for Power Reduction in Large FPGA Designs., , , и . ISVLSI, стр. 209-214. IEEE Computer Society, (2018)Wibheda: Framework for Data Dependency-Aware Multi-Constrained Hardware-Software Partitioning in FPGA-Based SoCs for IoT Devices., , , , и . FCCM, стр. 213. IEEE Computer Society, (2018)Architecture-Aware Custom Instruction Generation for Reconfigurable Processors., , , и . ARC, том 5992 из Lecture Notes in Computer Science, стр. 414-419. Springer, (2010)Efficient Heuristics for Minimizing Communication Overhead in NoC-based Heterogeneous MPSoC Platforms., , , и . IEEE International Workshop on Rapid System Prototyping, стр. 55-60. IEEE Computer Society, (2009)Technique for Vendor and Device Agnostic Hardware Area-Time Estimation., , , , , и . ARC, том 12083 из Lecture Notes in Computer Science, стр. 166-177. Springer, (2020)