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Disambiguation of "Hamashita, Koichi"

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Binary Access Memory: An optimized lookup table for successive approximation applications.

, , , , and . ISCAS, page 1620-1623. IEEE, (2011)

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Koichi Matsumoto

Koichi Koshi

Koichi Morikawa

 

Other publications of authors with the same name

A self-calibrated 2-1-1 cascaded continuous-time ΔΣ modulator., , , , and . CICC, page 9-12. IEEE, (2009)A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays., , , , , , , and . ESSCIRC, page 221-224. IEEE, (2015)A 14b 60 MS/s Pipelined ADC Adaptively Cancelling Opamp Gain and Nonlinearity., , , , , and . IEEE J. Solid State Circuits, 49 (2): 416-425 (2014)An Oversampling Stochastic ADC Using VCO-Based Quantizers., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (12): 4037-4050 (2018)A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators., , , , , , , , , and . IEEE J. Solid State Circuits, 40 (12): 2398-2407 (2005)A 16b 1.62MS/s Calibration-free SAR ADC with 86.6dB SNDR utilizing DAC Mismatch Cancellation Based on Symmetry., , , and . A-SSCC, page 1-2. IEEE, (2020)A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR., , , , , , and . ISSCC, page 494-495. IEEE, (2008)A 50 MHz bandwidth 54.2 dB SNDR reference-free stochastic ADC using VCO-based quantizers., , , , , and . A-SSCC, page 325-328. IEEE, (2016)Binary Access Memory: An optimized lookup table for successive approximation applications., , , , and . ISCAS, page 1620-1623. IEEE, (2011)Parallel gain enhancement technique for switched-capacitor circuits., , , , , , and . CICC, page 1-4. IEEE, (2013)