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Speedpath prediction based on learning from a small set of examples., , , and . DAC, page 217-222. ACM, (2008)Design-Silicon Timing Correlation A Data Mining Perspective., , and . DAC, page 384-389. IEEE, (2007)Automatic Generation of Assertions for Formal Verification of PowerPC Microprocessor Arrays Using Symbolic Trajectory Evaluation., , and . DAC, page 534-537. ACM Press, (1998)Novel test analysis to improve structural coverage - A commercial experiment., , , and . VLSI-DAT, page 1-4. IEEE, (2013)Impact of multiple input switching on delay test under process variation., , and . VTS, page 87-92. IEEE Computer Society, (2010)Discovering Interesting Plots in Production Yield Data Analytics., , , and . CoRR, (2018)On Efficiently Producing Quality Tests for Custom Circuits in PowerPCTM Microprocessors., and . J. Electron. Test., 16 (1-2): 121-130 (2000)Enhanced Symbolic Simulation for Functional Verification of Embedded Array Systems., , , , and . Des. Autom. Embed. Syst., 8 (2-3): 173-188 (2003)Multivariate outlier modeling for capturing customer returns - How simple it can be., , , and . IOLTS, page 164-169. IEEE, (2014)Module placement with boundary constraints using the sequence-pair representation., , , and . ASP-DAC, page 515-520. ACM, (2001)