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A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist.

C. Lu, C. Chuang, S. Jou, M. Tu, Y. Wu, C. Huang, P. Kan, H. Huang, K. Lee, и Y. Kao. IEEE Trans. Very Large Scale Integr. Syst., 23 (5): 958-962 (2015)

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Claudia Kuen

Otto Kuen

Heinrich Kuen

Susanne Kuen

Claudia Kuen

Другие публикации лиц с тем же именем

A 0.35 V, 375 kHz, 5.43 µW, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line.S. Wu, C. Lu, M. Tu, H. Huang, K. Lee, Y. Kao, и C. Chuang. Microelectron. J., (2016)A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control.H. Yang, S. Yang, M. Hsia, Y. Lin, Y. Lin, C. Chen, C. Chang, G. Lin, Y. Chen, C. Chuang и 9 other автор(ы). SoCC, стр. 197-200. IEEE, (2011)An all-digital Read Stability and Write Margin characterization scheme for CMOS 6T SRAM array.Y. Lin, M. Tsai, H. Yang, G. Lin, S. Wang, C. Chuang, S. Jou, W. Hwang, N. Lien, K. Lee и 1 other автор(ы). VLSI-DAT, стр. 1-4. IEEE, (2012)Embedded SRAM ring oscillator for in-situ measurement of NBTI and PBTI degradation in CMOS 6T SRAM array.M. Tsai, Y. Lin, H. Yang, M. Tu, W. Shih, N. Lien, K. Lee, S. Jou, C. Chuang, и W. Hwang. VLSI-DAT, стр. 1-4. IEEE, (2012)A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist.S. Wu, K. Li, P. Huang, W. Hwang, M. Tu, S. Lung, W. Peng, H. Huang, K. Lee, Y. Kao и 1 other автор(ы). IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (7): 1791-1802 (2017)A 0.33-V, 500-kHz, 3.94-µW 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist.C. Lu, M. Tu, H. Yang, Y. Wu, H. Huang, Y. Lin, K. Lee, Y. Kao, C. Chuang, S. Jou и 1 other автор(ы). IEEE Trans. Circuits Syst. II Express Briefs, 59-II (12): 863-867 (2012)High-performance 0.6V VMIN 55nm 1.0Mb 6T SRAM with adaptive BL bleeder.H. Yang, Y. Lin, M. Hsia, G. Lin, C. Chang, Y. Chen, C. Chuang, W. Hwang, S. Jou, N. Lien и 6 other автор(ы). ISCAS, стр. 1831-1834. IEEE, (2012)A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply Write-assist.Y. Lin, H. Yang, M. Hsia, Y. Lin, C. Chen, C. Chuang, W. Hwang, N. Lien, K. Lee, W. Shih и 3 other автор(ы). SoCC, стр. 218-223. IEEE, (2012)A 40nm 1.0Mb pipeline 6T SRAM with variation-tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist.C. Chang, H. Yang, W. Liao, Y. Lin, N. Lien, C. Chen, C. Chuang, W. Hwang, S. Jou, M. Tu и 9 other автор(ы). ISCAS, стр. 1468-1471. IEEE, (2013)A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist.C. Lu, C. Chuang, S. Jou, M. Tu, Y. Wu, C. Huang, P. Kan, H. Huang, K. Lee, и Y. Kao. IEEE Trans. Very Large Scale Integr. Syst., 23 (5): 958-962 (2015)

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Please choose a person to relate this publication to

Claudia Kuen

Otto Kuen

Heinrich Kuen

Susanne Kuen

Claudia Kuen

Другие публикации лиц с тем же именем

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