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Disambiguation of "Yang, Hao-I"

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Embedded SRAM ring oscillator for in-situ measurement of NBTI and PBTI degradation in CMOS 6T SRAM array.

, , , , , , , , , and . VLSI-DAT, page 1-4. IEEE, (2012)

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Hao Yang

Hao Yang

I Yang

Hao-Yang Wei

Wen-I Yang

 

Other publications of authors with the same name

Impacts of gate-oxide breakdown on power-gated SRAM., , and . Microelectron. J., 42 (1): 101-112 (2011)Impacts of NBTI/PBTI and Contact Resistance on Power-Gated SRAM With High-kappa Metal-Gate Devices., , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (7): 1192-1204 (2011)Impacts of NBTI/PBTI on Timing Control Circuits and Degradation Tolerant Design in Nanoscale CMOS SRAM., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (6): 1239-1251 (2011)A 40nm 1.0Mb pipeline 6T SRAM with variation-tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist., , , , , , , , , and 9 other author(s). ISCAS, page 1468-1471. IEEE, (2013)Low-power floating bitline 8-T SRAM design with write assistant circuits., , and . SoCC, page 239-242. IEEE, (2008)A 40nm 1.0Mb 6T pipeline SRAM with digital-based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS tracking and Adaptive Voltage Detector for boosting control., , , , , , , , , and 3 other author(s). SoCC, page 110-115. IEEE, (2013)High-performance 0.6V VMIN 55nm 1.0Mb 6T SRAM with adaptive BL bleeder., , , , , , , , , and 6 other author(s). ISCAS, page 1831-1834. IEEE, (2012)A 0.33-V, 500-kHz, 3.94-µW 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist., , , , , , , , , and 1 other author(s). IEEE Trans. Circuits Syst. II Express Briefs, 59-II (12): 863-867 (2012)A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply Write-assist., , , , , , , , , and 3 other author(s). SoCC, page 218-223. IEEE, (2012)Impacts of NBTI and PBTI on Power-gated SRAM with High-k Metal-gate Devices., , and . ISCAS, page 377-380. IEEE, (2009)