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Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction.

C. Chou, Y. Lai, Y. Chang, C. Wang, L. Cheng, S. Huang, and S. Chang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (1): 146-155 (2017)

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Chia-Chun Liang

Chia-Liang Lin

Chia-Cheng Wu

Liang Liang

Cheng-Yung Cheng

Other publications of authors with the same name

Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits.P. Luo, J. Chen, C. Wey, L. Cheng, J. Chen, and W. Wu. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (11): 2097-2101 (2008)Selective body biasing for post-silicon tuning of sub-threshold designs: A semi-infinite programming approach with Incremental Hypercubic Sampling.H. Geng, J. Liu, J. Liu, P. Luo, L. Cheng, S. Grant, and Y. Shi. Integr., (2016)Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells.S. Luo, K. Chang, M. Chen, C. Huang, Y. Chiu, P. Chen, L. Cheng, C. Liu, and Y. Chu. IEEE Trans. Circuits Syst. II Express Briefs, 61-II (12): 947-951 (2014)Power delivery network design for wiring and TSV resource minimization in TSV-based 3-D ICs.S. Wei, Y. Lee, C. Ho, C. Sun, and L. Cheng. VLSI-DAT, page 1-4. IEEE, (2013)Benchmarking for research in power delivery networks of three-dimensional integrated circuits.P. Luo, C. Zhang, Y. Chang, L. Cheng, H. Lee, B. Sheu, Y. Su, D. Kwai, and Y. Shi. ISPD, page 17-24. ACM, (2013)Methodology of exploring ESL/RTL many-core platforms for developing embedded parallel applications.J. Lai, C. Huang, T. Hsu, J. Liou, T. Yeh, L. Cheng, and J. Lu. SoCC, page 286-291. IEEE, (2014)Thermal modeling and design on smartphones with heat pipe cooling technique.H. Chiou, Y. Lee, H. Hsiao, and L. Cheng. ICCAD, page 482-489. IEEE, (2017)Approximate Computing for Batch Learning in Neural Network.L. Lin, J. Schroff, C. Liang, and T. Huang. ICCE-TW, page 1-2. IEEE, (2020)A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.T. Lin, C. Chien, P. Chang, C. Chen, P. Wang, T. Shyu, C. Chou, S. Luo, J. Guo, T. Chen and 8 other author(s). ISSCC, page 158-159. IEEE, (2013)Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs).P. Luo, T. Wang, C. Wey, L. Cheng, B. Sheu, and Y. Shi. ISVLSI, page 356-361. IEEE Computer Society, (2012)

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Disambiguation of "Cheng, Liang-Chia"

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Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction.

Please choose a person to relate this publication to

Chia-Chun Liang

Chia-Liang Lin

Chia-Cheng Wu

Liang Liang

Cheng-Yung Cheng

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Cheng, Liang-Chia"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction.

Please choose a person to relate this publication to

Chia-Chun Liang

Chia-Liang Lin

Chia-Cheng Wu

Liang Liang

Cheng-Yung Cheng

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction.