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Disambiguation of "Shu, Guanghua"

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A Burst-Mode Digital Receiver With Programmable Input Jitter Filtering for Energy Proportional Links.

, , , , and . IEEE J. Solid State Circuits, 50 (3): 737-748 (2015)

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Guanghua Lin

Guanghua Du

Lijin Shu

Shu Zhang

Changshan Shu

 

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An Embedding-Based Grocery Search Model at Instacart., , , , , , , , , and . CoRR, (2022)3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS., , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 45-75MHz 197-452µW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2017)A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver., , , , , , , and . IEEE J. Solid State Circuits, 52 (5): 1399-1411 (2017)A 0.0021 mm2 1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS., , , , , and . IEEE J. Solid State Circuits, 52 (1): 8-20 (2017)A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition., , , , , , , and . IEEE J. Solid State Circuits, 51 (2): 428-439 (2016)A 0.45-0.7 V 1-6 Gb/s 0.29-0.58 pJ/b Source-Synchronous Transceiver Using Near-Threshold Operation., , , , , , and . IEEE J. Solid State Circuits, 53 (3): 884-895 (2018)Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers., , , , and . IEEE J. Solid State Circuits, 53 (6): 1806-1817 (2018)Design Considerations of Monolithically Integrated Voltage Regulators for Multicore Processors., , , , , , , and . ISCAS, page 1-5. IEEE, (2018)A 12-bit 50-MSPS SHA-less opamp-sharing Analog-to-Digital converter in 65nm CMOS., , , , and . ASICON, page 894-897. IEEE, (2011)